1. Field of the Invention
The present invention relates to methods for effecting edge bias correction of topography-induced linewidth variations which are encountered in printed or integrated circuits on substrates or semiconductor devices for electronic packages.
In essence, during the formation of printed or integrated circuits there may be encountered undesirable topography-induced linewidth (LW) variations in view of the aspect that prior patterning levels can conceivably create topography which causes (photo) resist and/or antireflective coating (ARC) thickness variations in the level which is being currently implemented. In effect, these variations and diverse thicknesses may lead to linewidth (LW) variations in the printed circuits due to thin film interference (TFI) effects.
2. Discussion of the Prior Art
Although the technology has addressed itself to deriving different solutions which are designed for effectuating the reducing of topography-induced linewidth (LW) variations, these concepts have not always proven themselves to be entirely practical or economical in their applications in attempts to optimize LW controls.
a) Thus, for instance, efforts have been expended to reduce topography-induced LW variations by attempting to reduce and/or eliminate the topography. This, theoretically would be ideal, but frequently is impractical or even impossible to physically implement with currently available technology.
b) Furthermore, certain processing enhancements may also be employed such as:
i) the use of thicker ARC""s which reduce the thin film interference (TFI) but which cause more problems in implementing the etching. Consequently, there is encountered a tradeoff in etch variations for TFI reductions, which is of a somewhat impractical value in nature;
ii) employ top ARC""s, which add process costs and complexity, limit material choices, but which may still provide some undue linewidth (LW) variations.
iii) implement thickness optimization; however, in the event that the topography is large enough, then it becomes difficult to optimize. Moreover, even with optimization of the thickness this may cause some undue linewidth (LW) variations.
The present invention, in essence, is intended to solve the problems that are encountered in the current state-of-the technology, wherein prior patterning levels in the formation of printed circuits can create topographies which cause resist and antireflective coating (ARC) thickness variations in current photoresist application levels; whereby, in turn, these thickness variations lead to undesirable linewidth (LW) variations due to encountered thin film interference (TFI) effects.
Accordingly, in order to clearly and unambiguously improve upon and possibly eliminate the limitations and drawbacks which are encountered in the current state-of-the technology, the invention modifies data for current levels which is predicated on prior level data and models, as to the manner in which topography will affect the resist and antireflective coating (ARC) thicknesses, so as to improve upon linewidth (LW) control and, in general, imparting improved processing windows.
Pursuant to the invention, the data for the current level design data is modified to compensate for the effects of prior level topography, whereby the data modification consists of shifting edges of shapes in the data set. The amount of the shift is determined according to width or area of underlying pattern regions, or according to underlying pattern density.
Furthermore, in accordance with the invention the method for improving upon linewidth control may be implemented as computer-executable instructions which may be embodied in a program module or module stored on computer-useable media. A suitable computer program or collection of programs may be employed to implement the method in a variety of programming structures in data forms predicated on the information contained in the present specification.
Accordingly, it is an object of the present invention to improve upon topography-induced variations in linewidth (LW) in the formation of printed circuits by the expedients of modifying data for current levels based upon prior level data and models, as to the manner in which topography will affect resist and ARC thicknesses.
Another object of the invention is to provide a novel method of improved linewidth control and improved processing windows by employing data modification for the current level predicated on prior level data and models of topography affecting resist and ARC thicknesses.
Yet another object of the present invention is to provide for a method for edge bias correction of topography-induced printed circuit linewidth variations through the intermediary of modifying current level design data to compensate for the effects caused by prior level interference (TFI) effects in view of the creation of a topography leading to resist and antireflective coating (ARC) thickness variations.
Still another object of the present invention resides in the provision of a computer program or a collection of programs adapted to implement the inventive method in the form of computer-executable instructions, which may be tangibly embodied in a program module or module stored on computer-useable media.